Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1998-02-06
2000-10-31
Beausoliel, Jr., Robert W.
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
714 1, 714 2, 714 23, 714 36, 714 48, 714 55, 707202, 707203, 709202, 709208, 709209, 711162, 711165, G06F 1100
Patent
active
061417718
ABSTRACT:
A system and method for providing a trusted machine state in a data processing system is disclosed. The data processing system includes a memory. The trusted machine state is stored in a first portion of the memory. The method and system include saving the trusted machine state in a second portion of the memory and reinitializing a portion of the memory. The portion of memory is separate from the second of memory. The method and system further include restoring the trusted machine state in the memory. According to the method and system disclosed herein, the data processing system may recover from failures and resume operation. Moreover, a non-disruptive code load, in which a new program can be loaded without disrupting system operations, may be performed.
REFERENCES:
patent: 4918653 (1990-04-01), Johri et al.
patent: 5345583 (1994-09-01), Davis
patent: 5551051 (1996-08-01), Silverthorn et al.
patent: 5581723 (1996-12-01), Hasbun et al.
Hostetter David G.
O'Brien John Timothy
Beausoliel, Jr. Robert W.
Hamdan Wasseem H.
International Business Machines - Corporation
Klein Esther
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