Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Lateral bipolar transistor structure
Reexamination Certificate
2002-06-19
2003-05-20
Crane, Sara (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Lateral bipolar transistor structure
C257S560000, C257S423000, C257S559000, C257S197000, C257S565000, C257S556000
Reexamination Certificate
active
06566733
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates specifically to high current semiconductor devices and more particularly to a power lateral PNP device using a buried power buss.
BACKGROUND OF THE INVENTION
Lateral PNP transistors are utilized extensively in high power applications. They are typically deeply diffused devices that carry very high current (1-5 amps or higher).
FIG. 1
shows a cross-section of a standard deep diffused PNP device
10
. The emitter
14
is the inside electrode. As shown, this can represent a bulls-eye pattern with the emitter as the bulls-eye and the collector surrounding it, or double collector lines adjacent to each side of an emitter. The device
10
includes two P+ collectors
12
a
and
12
b
and P+ emitter
14
between. The two P+ collectors
12
a
,
12
b
and the P+ emitter
14
are diffused in an N epitaxial layer
15
. An N+ layer
18
(the buried layer) is deposited in a P− substrate
20
which is coupled to the N epitaxial layer
15
. An N+ base contact
16
is coupled to the surface of the N epitaxial layer
15
and coupled electrically via the N+ buried layer to apply a voltage between the N base and the P+ emitter
14
. The collectors
12
a
and
12
b
include a metal layer
12
a
and
12
b
respectively on the surface thereof. The collectors TCF
12
a
and
12
b
are outside circular electrodes when a bulls-eye pattern is used and are parallel separate structures when parallel inline design is used. The base
16
is contacted via a metalized N diffusion that is placed in the N epitaxial layer
15
. For some applications it is tied to the N+ buried layer.
Injection from the emitter
14
is from the total outside periphery of the emitter for the total depth of the emitter. This results in a tremendous difference in the base widths since the surface portion of the emitter
12
is closest to the edge of the surface of the collectors and therefore has the shortest base width. Moving down the periphery of the emitter
12
a
and
12
b
, the base width becomes longer and longer and reaches its maximum base width at the deepest point
23
.
Referring back to
FIG. 1
, it is obvious that most of the injection and collection could be considered coming from two transistors in parallel. Transistor XR being on the right half of the emitter and its injection being collected by transistor XR. While at the same time transistor YL on the left half of the emitter has its injection being collected by YL, the collector on the left side. To give some general quantitative idea of the basewidths, assume that the distance from the emitter to collector is 8 &mgr;m on the mask. If, for example, the P diffusions are 2.5 &mgr;m deep and the side diffusion is 2.0 &mgr;m around the total periphery of the emitter and collector, then this leaves the basewidth approximately 4 &mgr;m long at the surface and approximately 8 &mgr;m long from point
23
. In fact, these effective basewidths are much less due to the depletion region extending from the collectors into the base region
16
(N epitaxial layer) and the depletion region of the emitters extending into the base region
16
(N epitaxial layer). This particular example may not be able to work at very high voltages due to punch-through. It is very easy to have depletion widths of a micron or more. This leaves the surface with a basewidth of approximately 2 &mgr;m and the basewidth of the bottom of approximately 6 &mgr;m.
Without surface effects, this means the surface portion of these two transistors in parallel have the highest beta and the best frequency response, while the deep points have the lowest beta and the worst frequency response.
In general, the beta coming from the bottom point
23
of these transistors can be ignored. Beta is much lower than is achieved at the surface mainly limited by recombination in the bulk as well as the fact that the base emitter voltage (V
be
) is somewhat less at the bottom due to some additional drop from the base contact to the actual base. Likewise, it can be assumed that some of the surface beta is lost due to surface recombination velocity. It can then be assumed that the beta is the average beta with a base width of approximately 3 &mgr;m. However, beta is a function of the amount of current collected versus the amount of current emitted. The current being emitted is along the total periphery of the two transistors in parallel as determined by the base emitter voltage (V
be
) and the resultant low base current. The current being collected as a result of this emission is much less due to the issues just discussed, therefore resulting in a beta that is much lower.
The frequency response of the standard lateral PNP is determined by the worse response of the structure. This means the bottom of the radial structure is determining the frequency response of the device due to its long basewidth. Frequency response is determined by where the output is down to 0.707 of the low frequency output. At low frequency the current, and therefore the beta is made up of all the varying basewidths from top to bottom of the structure.
As the frequency increases the bottom of the structure with the long basewidth has recombination occurring on the long basewidths and the output current for a given input current goes down. This shows the total structure as having a lower output current as the frequency increases. The long basewidth device is therefore determining when the overall output is down to 0.707 of the low frequency output. For a power lateral PNP device, where frequency response may not be an issue this is of secondary concern; gain is the primary concern.
Another issue with the standard approach relates to debiasing of the emitter when carrying high current. This occurs because metal is on top of the emitter and therefore the maximum voltage is applied on the surface and the voltage drops to lower values as one goes along the depth of the emitter due to drops in the resistance of the emitter. This drop can be very high since the current may run 1 amp to greater than 5 amps and any amount of resistance will result in significant debiasing.
An ideal lateral PNP would have a profile as shown in
FIG. 2
, where the emitter and collectors are vertical spikes that have the same basewidth from top to bottom. It would also have metal the full depth to reduce debiasing.
Accordingly, what is needed is a system and method for providing a power lateral PNP is that approaches this ideal structure. This lateral PNP would have an improved beta and frequency response. The present invention addresses such a need with two approaches.
SUMMARY OF THE INVENTION
A power lateral PNP device is disclosed which includes an epitaxial layer; a first and second collector region embedded in the epitaxial layer; an emitter region between the first and second collector regions. Therefore slots are placed in each of the regions. Accordingly, in a first approach the standard process flow will be followed until reaching the point where contact openings and metal are to be processed. In this approach slots are etched that are preferably 5 &mgr;m to 6 &mgr;m deep and 5 to 6 &mgr;m wide. These depths are examples. They can be changed for different thicknesses of epitaxial material or for different junction depths in the given technology. These slots are then oxidized either thermally or by deposition of an oxide or dielectric layer and will be subsequently metalized. When used for making metal contacts to the buried layer or for ground the oxide is removed from the bottom of these particular slots by an anisotropic etch. Subsequently when these slots receive metal they will provide contacts to the buried layer where this is desired and to the substrate when a ground is desired.
In a second approach the above-identified process is completed up through the slot process without processing the lateral PNPs. With a separate masking and etching, the oxide is removed from the PNP slots and boron is deposited in a diffusion furnace and driven in a non-oxidizing atmosphere.
Husher John Durbin
Schlupp Ronald L.
Im Junghwa
Micrel Inc.
Sawyer Law Group LLP
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