Method and system for programmable replacement mechanism for...

Details Method and system for programmable replacement mechanism for... Method and system for programmable replacement mechanism for...

2005-01-25

2005-01-25

Vital, Pierre M. (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S133000

Reexamination Certificate

active

06848025

ABSTRACT:
A caching device using an N-way replacement mechanism is disclosed. The replacement mechanism comprises at least one replacement order list with N positions, with the first-to-replace position at one end and the last-to-replace position at the opposite end, each position containing a way number, N way comparators, a control unit, a replacement order generator, and receiving a hit signal and, in case of a hit, a hit way number. A system and method in accordance with the present invention provides a programmable replacement mechanism applicable to caching devices, such as instruction and data caches and TLBs (translation lookaside buffers) in processors or texture map caches in graphics systems, that use set associative or fully associative organization. A replacement order list is maintained that specifies the order of which the elements in a set are to be selected for replacement.

REFERENCES:
patent: 5831640 (1998-11-01), Wang et al.
patent: 5970509 (1999-10-01), Green
patent: 6205519 (2001-03-01), Aglietti et al.
patent: 6571317 (2003-05-01), Supnet
patent: 6643737 (2003-11-01), Ono
patent: 6732238 (2004-05-01), Konas et al.

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