Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
Reexamination Certificate
2006-12-12
2006-12-12
Baker, Stephen M. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Error/fault detection technique
C348S180000, C348S192000
Reexamination Certificate
active
07149954
ABSTRACT:
Provided is a system and method for performing CRC analysis in a video test bench. An exemplary system includes a memory configured for storing a required number representative of the data fields to be analyzed. A module is coupled at least indirectly to the memory and configured for (i) receiving an input data stream, (ii) performing cyclic redundancy check (CRC) analysis of the received data stream, and (iii) producing an output representative of an actual number of received data fields analyzed. The input data stream includes synchronization markers defining boundaries of each of the received data fields. Next, a comparator is configured for (i) comparing the required number and the actual number and (ii) producing a disabling signal when the actual number matches the required number. A detector is coupled to the comparator and configured for (i) receiving the input data stream and sensing a presence of the synchronization markers, (ii) receiving the disabling signal, and (iii) disabling the CRC module when the disabling signal is received.
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European Search Report from European Patent Application No. 04017520.0, 3 pages, dated Mar. 16, 2005.
Huang Wen
Monahan Charles Thomas
Neuman Darren
Shih Guang Ting
Tang Chengfuh Jeffrey
Baker Stephen M.
Broadcom Corporation
Sterne Kessler Goldstein & Fox PLLC
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