Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
2006-05-09
2008-11-04
Knoll, Clifford (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S240000, C710S113000, C710S123000
Reexamination Certificate
active
07447817
ABSTRACT:
Method and system for arbitrating between plural arbitration requests is provided. The system includes a plurality of first stage arbiters that receive plural arbitration requests and a signal that indicates a previously granted request, wherein the first stage arbiters assert a high priority request signal if a high priority request is pending and a low priority request signal is asserted, if a low priority request is pending; a second stage arbiter that arbitrates between high priority requests, when high priority requests are pending; wherein if a high priority request is not pending, then a low priority request is granted; and a data handler module that operates in parallel with the second stage arbiter to immediately move data associated with a request that is granted at any given time.
REFERENCES:
patent: 5680554 (1997-10-01), Baek
patent: 7120714 (2006-10-01), O'Connor et al.
patent: 2006/0047873 (2006-03-01), Bose et al.
patent: 2007/0186027 (2007-08-01), Klema et al.
Huynh Kim T
Klein O'Neill & Singh, LLP
Knoll Clifford
QLOGIC Corporation
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