Method and system for performing heuristic constraint...

Details Method and system for performing heuristic constraint... Method and system for performing heuristic constraint...

2005-09-22

2008-01-01

Lin, Sun James (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

07315996

ABSTRACT:
A method for performing verification is disclosed. The method includes selecting a first computer-design constraint for simplification and applying structural reparameterization to simplify the first computer-design constraint. In response to determining that the first computer-design constraint is not eliminated, the first computer-design constraint is set equal to a dead-end state of the constraint. A structural preimage of the first computer-design constraint is created, in response to determining that a combination of a target and the dead-end state of the first computer-design constraint is equal to a combination of the target and the structural preimage of the first computer-design constraint, the first computer-design constraint is set equal to the structural preimage.

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patent: 6836877 (2004-12-01), Dupenloup
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Yuan et al., Constraint Synthesis for Environment Modeling in Functional Verification, DAC, 2003.
Mony et al.; “Exploiting Constraints in Transformation-Based Verification”; Correct Hardware Design and Verification Methods Conference; Oct. 3, 2005.
Hari Mony; “Transformation-Based Verification”; Doctoral Dissertation Proposal; Presented to the Electrical and Computer Engineering Committee at the University of Texas at Austin; Aug. 26, 2005; http://users.ece.utexas.edu/˜mony/.

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