Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2007-01-23
2007-01-23
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S133000, C711S134000, C711S138000, C711S144000, C711S154000, C711S156000, C711S159000, C711S160000, C710S014000
Reexamination Certificate
active
10667235
ABSTRACT:
A method of writing to cache including initiating a write operation to a cache. In a first operational mode, the presence or absence of a write miss is detected and if a write miss is absent, writing data to the cache and if a write miss is present, retrieving the data from a further memory and writing the data to the cache based on least recently used logic. In a second operational mode, the cache is placed in a memory mode and the data is written to the cache based on an address regardless of whether a write miss is present or absent.
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Desai Krishna M.
Keste Anil S.
Lo Tin-chee
Needham Thomas D.
Ng Yuk-Ming
Cantor & Colburn LLP
International Business Machines - Corporation
Kim Matthew
Patel Hetul
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