Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-09-12
2008-08-05
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C703S013000, C703S014000
Reexamination Certificate
active
07409656
ABSTRACT:
Disclosed is an improved method and system for implementing parallel processing of computing operations by effectively handling dependencies between different sequences of computing operations. In some approaches, some or all operations corresponding to dependencies between different sequences of operations are duplicated among the different sequences. This approach may be used to implement parallel processing of EDA tools.
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Cadence Design Systems Inc.
Chiang Jack
Doan Nghia M
Vista IP Law Group LLP
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