Method and system for parallel state machine implementation

Details Method and system for parallel state machine implementation Method and system for parallel state machine implementation

2007-12-11

2007-12-11

Barnie, Rexford (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Sequential or with flip-flop

C341S107000, C711S005000

Reexamination Certificate

active

10961058

ABSTRACT:
Methods and computer readable media are provided for implementing state machines in parallel. A control vector is generated from current state and input bits. This vector is then used to determine the next state and any output bits for each of a plurality of state machines in parallel. In some implementations, the Altivec vperm instruction is used to perform a parallel table look-up.

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