Method and system for parallel bus stepping using dynamic...

Electrical computers and digital processing systems: support – Computer power control

Reexamination Certificate

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Details

C710S107000, C710S305000

Reexamination Certificate

active

06708277

ABSTRACT:

FIELD OF THE INVENTION
The invention relates to the field of computer communications and, more particularly, to a method and system for parallel bus stepping using dynamic signal grouping.
BACKGROUND OF THE INVENTION
In modern-day portable computer systems, emphasis is placed on reducing the power required to perform various computer processes. By reducing power consumption, portable computer users can operate under battery power for extended periods of time. Additionally, batteries can be made smaller and more lightweight while still providing the same number of operating hours. This enables portable computer systems to be even more attractive to users to due to their increased portability.
In order to reduce the power required to perform communications functions, portable computer units can make use of various standards, such as the Peripheral Component Interconnect bus in order to be interfaced with ancillary equipment such as disk drives and printer equipment. Generally, these bus structures provide operating protocols in which speed and power can be traded in order to optimize performance under various circumstances. Thus, speed can be sacrificed in order to reduce power consumption while power consumption can be increased in order to provide a higher speed interface with ancillary components.
Therefore, it is highly desirable to make use of a parallel bus structure which allows a high-speed interface with peripheral components while maintaining a low level of power consumption.


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IBM Technical Disclosure Bulletin—“Design of a Totally Interlocked Data Path for Noise Reduction”—Oct. 1, 1993—vol. 36—Issue 10—pp. 17-18.

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