Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
Reexamination Certificate
2007-08-21
2007-08-21
Bataille, Pierre-Michel (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Memory configuring
C713S001000, C713S100000, C711S202000
Reexamination Certificate
active
10697867
ABSTRACT:
A method, an apparatus, and a computer program product are presented for memory page initialization operations. After an application thread attempts to reference a memory page, an exception or fault may be generated, and a physical memory page is allocated. The application thread is put to sleep, and a page initialization request is given to a kernel off-level worker thread, after which the interrupt-level processing is concluded. During the normal course of execution for the worker thread, the worker thread recognizes the page initialization request, and the worker thread initializes the newly allocated page by zeroing the page or by copying the contents of a source page to the newly allocated page, as appropriate. The worker thread then puts the application thread into a runnable state.
REFERENCES:
patent: 6128713 (2000-10-01), Eisler et al.
patent: 6247042 (2001-06-01), Engstrom et al.
patent: 6408305 (2002-06-01), Stoodley
patent: 7139909 (2006-11-01), Lee
“Packing Variable-Sized Segments in the Swap File of a Paging-Based Virtual Memory System”, IBM Technical Disclosure Bulletin, vol. 39, No. 3, Mar. 1996, pp. 301/302 XP000581702.
Bataille Pierre-Michel
Hamilton & Terrile LLP
Terrile Stephen A.
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