Method and system for overlapping execution of instructions...

Electrical computers and digital processing systems: processing – Processing control

Reexamination Certificate

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C712S222000

Reexamination Certificate

active

07913067

ABSTRACT:
A system and method for overlapping execution (OE) of instructions through non-uniform execution pipelines in an in-order processor are provided. The system includes a first execution unit to perform instruction execution in a first execution pipeline. The system also includes a second execution unit to perform instruction execution in a second execution pipeline, where the second execution pipeline includes a greater number of stages than the first execution pipeline. The system further includes an instruction dispatch unit (IDU), the IDU including OE registers and logic for dispatching an OE-capable instruction to the first execution unit such that the instruction completes execution prior to completing execution of a previously dispatched instruction to the second execution unit. The system additionally includes a latch to hold a result of the execution of the OE-capable instruction until after the second execution unit completes the execution of the previously dispatched instruction.

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z/Architecture, Principles of Operation, Sixth Edition, Apr. 2007, Publication No. SA22-7832-05, copyright IBM Corp. 1990-2007, pp. 1-1218.

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