Method and system for ordering requests at a bus interface

Details Method and system for ordering requests at a bus interface Method and system for ordering requests at a bus interface

2007-03-20

2007-03-20

Rinehart, Mark H. (Department: 2112)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus interface architecture

C710S052000, C710S053000, C710S054000, C710S220000

Reexamination Certificate

active

11064728

ABSTRACT:
A bus bridge for coupling between a first bus and a second bus includes: multiple ticket registers; a ticket dispenser counter; and a ticket call counter. The ticket dispenser counter dispenses a ticket value to a request received at the bridge from the first bus for access to the second bus. This ticket value is held in one ticket register of the multiple ticket registers. The ticket call counter provides ticket call values, and the request is granted access to the second bus when a current ticket call value equals the ticket value dispensed to the request. While the request waits for access to the second bus, the bus bridge can perform work on the request. When request coherency is maintained employing snooping, ticket values assigned to a plurality of requests maintain a snoop response ordering of the requests for access to the second bus.

REFERENCES:
patent: 4281381 (1981-07-01), Ahuja et al.
patent: 5038346 (1991-08-01), Courtois
patent: 5546546 (1996-08-01), Bell et al.
patent: 5581705 (1996-12-01), Passint et al.
patent: 5740409 (1998-04-01), Deering
patent: 5778096 (1998-07-01), Stearns
patent: 5835739 (1998-11-01), Bell et al.
patent: 5841973 (1998-11-01), Kessler et al.
patent: 5893151 (1999-04-01), Merchant
patent: 6021451 (2000-02-01), Bell et al.
patent: 6124868 (2000-09-01), Asaro et al.
patent: 6247086 (2001-06-01), Allingham
patent: 6363438 (2002-03-01), Williams et al.
patent: 6405276 (2002-06-01), Chen et al.
patent: 6449699 (2002-09-01), Franke et al.
patent: 6571308 (2003-05-01), Reiss et al.
patent: 6668309 (2003-12-01), Bachand et al.
patent: 6694383 (2004-02-01), Nguyen et al.
patent: 6725296 (2004-04-01), Craddock et al.
patent: 6799317 (2004-09-01), Heywood et al.
patent: 6801207 (2004-10-01), Tischler et al.
patent: 6801208 (2004-10-01), Keshava et al.
patent: 6816161 (2004-11-01), Lavelle et al.
patent: 6820143 (2004-11-01), Day et al.
patent: 6820174 (2004-11-01), Vanderwiel
patent: 6889284 (2005-05-01), Nizar et al.
patent: 6978319 (2005-12-01), Rostoker et al.
patent: 2004/0117592 (2004-06-01), Day et al.
patent: 2004/0156199 (2004-08-01), Rivas et al.
patent: 2004/0162946 (2004-08-01), Day et al.
patent: 2004/0168011 (2004-08-01), Hemming
patent: 2004/0263519 (2004-12-01), Andrews et al.
patent: 2006/0069788 (2006-03-01), Blackmore et al.
John L. Hennessy et al.,Computer Architecture: A Quantitative Approach, Second Edition, Chapter 8: Multiprocessors, Morgan Kaufmann Publishing, pp. 638-639 and 680 (1996).

Affiliated with

Also associated with

Rating

Method and system for ordering requests at a bus interface does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and system for ordering requests at a bus interface, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and system for ordering requests at a bus interface will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3742637