Method and system for optimized circuit autorouting

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000, C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

07620922

ABSTRACT:
An approach is provided for selectively optimizing a circuit design, including generating a circuit routing solution according to a plurality of constraints for parametric resources of the circuit design, with the constraints being defined respectively by a plurality of corresponding constraint instances. Each constraint instance variably indicates an effective constraining limit and degree of consumption for at least one of the parametric resources. At least one of the constraints is selectively adjusted by a predetermined over-constraining amount, and the circuit routing solution is preliminarily modified by applying at least one routing action selected responsive to the constraint adjustment. The potential impact upon constraint compliance is evaluated, including generating a relative cost measure for the preliminary modification of the circuit routing solution, based at least partially upon each of the constraint instances. Thereafter, the preliminary modification of the circuit routing solution is either discarded or accepted responsive to the evaluation.

REFERENCES:
patent: 6363518 (2002-03-01), Lee
patent: 7194720 (2007-03-01), Borer et al.

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