Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output access regulation
Reexamination Certificate
2006-08-29
2006-08-29
Huynh, Kim (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output access regulation
C710S266000, C710S267000, C710S260000, C712S227000, C712S220000, C714S034000, C714S037000
Reexamination Certificate
active
07099963
ABSTRACT:
A history module for monitoring plural components in an embedded disk controller with a first main processor operationally coupled to a first bus and a second processor operationally coupled to a second bus is provided. The history module includes an event control module that receives break point conditions that stops the history module from recording information of a component; and a first register that allows selection or-de-selection of certain components in the embedded disk controller. The first register can also store a trigger mode value, which specifies a number of entries that are made in history module buffer(s) after a break point condition is detected.
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“Embedded RISC Microcontroller Core ARM7TDMI”-Revision 0673CS-11/99 Atmel Corporation, 1999.
Byers Larry L.
Dennin William W.
Desubijana Joseba M.
Robeck Gary R.
Huynh Kim
J Singh, Klein, & Singh, LLP
QLogic Corporation
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