Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing
Reexamination Certificate
2005-07-26
2005-07-26
Gaffin, Jeffrey (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Direct memory accessing
C710S024000, C710S025000, C710S027000
Reexamination Certificate
active
06922741
ABSTRACT:
Embodiments of the invention provide a status register for each channel of a DMA controller. The status register may be used to monitor and record events that occur during DMA data transfers, including timeouts and aborts.
REFERENCES:
patent: 4482982 (1984-11-01), Yu et al.
patent: 4716523 (1987-12-01), Burrus, Jr. et al.
patent: 5333274 (1994-07-01), Amini et al.
patent: 5499384 (1996-03-01), Lentz et al.
patent: 5659720 (1997-08-01), Fiacco et al.
patent: 5826107 (1998-10-01), Cline et al.
patent: 6081852 (2000-06-01), Baker
patent: 6484217 (2002-11-01), Fuente et al.
patent: 0 481 908 (1992-04-01), None
Patent Abstracts of Japan, vol. 2002, No. 02, Apr. 2, 2002 & JP 2001 297056 A (Canon Inc), Oct. 26, 2001.
Burton Robert
Joshi Aniruddha
Wang Jennifer
Blakely , Sokoloff, Taylor & Zafman LLP
Chen Alan S
Gaffin Jeffrey
Intel Corporation
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