Method and system for minimizing the length of a defect list...

Electrical computers and digital processing systems: memory – Address formation – Address mapping

Reexamination Certificate

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C711S100000, C711S154000, C711S200000, C714S006130

Reexamination Certificate

active

07013378

ABSTRACT:
A number of methods and systems for efficiently storing defective-memory-location tables. A asymmetrical-distortion-model vector quantization method and a run-length quantization method for compressing a defective-memory-location bit map that identifies defective memory locations within a memory are provided. In addition, because various different compression/decompression methods may be suitable for different types of defect distributions within a memory, a method is provided to select the most appropriate compression/decompression method from among a number of compression/decompression methods as most appropriate for a particular defect probability distribution. Finally, bit-map compression and the figure-of-merit metric for selecting an appropriate compression technique may enable global optimization of error-correcting codes and defective memory-location identification.

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Technique for using compressed bit-map for memory utilization; Apr. 1991, Kenneth Mason Publication, 2 pages.

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