Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2007-04-25
2010-12-21
Wilson, Yolanda L (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C711S128000, C711S136000
Reexamination Certificate
active
07856576
ABSTRACT:
In one embodiment, a controller for an associative memory having n ways contains circuitry for sending a request to search an indexed location in each of the n ways for a tag, wherein the tag and an index that is used to denote the indexed location form a memory address. The controller also contains circuitry, responsive to the request, for sending a set of n validity values, each validity value indicating, for a respective way, whether the indexed location is a valid location or a defective location. Additionally, the controller contains circuitry for receiving a hit signal that indicates whether a match to the tag was found at any of the indexed locations, wherein no hit is ever received for a defective location.
REFERENCES:
patent: 4996641 (1991-02-01), Talgam et al.
patent: 5019971 (1991-05-01), Lefsky et al.
patent: 5070502 (1991-12-01), Supnik
patent: 5551004 (1996-08-01), McClure
patent: 5666482 (1997-09-01), McClure
patent: 5708789 (1998-01-01), McClure
patent: 6006311 (1999-12-01), Arimilli et al.
patent: 6044441 (2000-03-01), Malinowski
patent: 6385071 (2002-05-01), Chai et al.
patent: 6412051 (2002-06-01), Konigsburg et al.
patent: 6567952 (2003-05-01), Quach et al.
patent: 6754117 (2004-06-01), Jeddeloh
patent: 6870782 (2005-03-01), Wu et al.
patent: 6918071 (2005-07-01), Cherabuddi et al.
patent: 6928591 (2005-08-01), Grinchuk et al.
patent: 7053470 (2006-05-01), Sellers et al.
patent: 7137027 (2006-11-01), Shiota et al.
patent: 7170802 (2007-01-01), Cernea et al.
patent: 7370151 (2008-05-01), Asher et al.
patent: 7376868 (2008-05-01), Yoshizawa et al.
patent: 2002/0124145 (2002-09-01), Arimilli et al.
patent: 2003/0088811 (2003-05-01), Cherabuddi et al.
patent: 2004/0078702 (2004-04-01), Yoshizawa et al.
patent: 2005/0273669 (2005-12-01), DeSota
Henrion Carson D.
Robinson Dan
Hewlett--Packard Development Company, L.P.
Wilson Yolanda L
LandOfFree
Method and system for managing memory transactions for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and system for managing memory transactions for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and system for managing memory transactions for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4154787