Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
1999-10-01
2002-01-22
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S129000, C711S136000
Reexamination Certificate
active
06341331
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to storage systems that have a direct access storage device, such as a disk memory, and a cache memory. In particular, the invention relates to a method and a system that provides enhanced performance by reducing host computer and channel wait times for data accesses to the storage system.
BACKGROUND OF THE INVENTION
A typical computer system includes a host computer and a direct access storage device (DASD), such as one or more magnetic disks. Applications running on the host computer access address locations in the DASD for reading and writing data. Such an access is known as a disk input/output (I/O) operation. The host computer operates at a much higher speed than the DASD such that I/O disk operations cause the running application to wait for the I/O operations to be completed. The result is that the host computer throughput is impeded. To avoid this, a separate high speed cache memory is employed to store data that is most frequently used by the application.
A storage system manager is used to control the I/O disk operations and accessing of the cache memory. Generally, the data is organized into data objects, such as records. When a running application requests a record, the storage system manager first looks for the record in the cache memory. If the requested record is found in the cache memory (i. e., “a hit”), it is quickly accessed and there is no need to perform a time consuming disk I/O operation. If the requested record is not found in the cache memory (i. e., “a miss”), then the storage system manager needs to perform a disk I/O operation to obtain the requested record from the DASD and to write the requested record to the cache memory.
Typically, the storage system manager manages record retention in the cache memory by a least recently used (LRU) technique. The LRU technique uses a chain or queue of control blocks. Each control block identifies (a) the address of a record, (b) a forward chain pointer that identifies the address of the next consecutive record in the chain and (c) a backward pointer that identifies the address of the preceding record in the chain. The storage system manager maintains a first anchor pointer that identifies the LRU record, e. g., the top end of the chain. The storage system manager also maintains a second anchor pointer that identifies the most recently used (MRU) record, e. g., the bottom end of the chain.
Each time a cache hit occurs, the control block for the hit record is dequeued and then enqueued as the MRU record at the bottom end of the LRU chain. Each time a cache miss occurs, the LRU control block is dequeued from the top end of the chain. The newly requested record is staged from DASD to an allocated address in the cache memory. The dequeued control block is updated with the identities of the staged record and the allocated address and enqueued at the bottom of the LRU chain as the MRU control block.
In the design of cache memories for storage systems, much attention is given to increasing the probability that requested data records will be found in the cache memory. For example, U.S. Pat. No. 5,717,893 discloses a cache memory that is partitioned into a global cache and a plurality of destaging local caches, with each local cache being allocated to storing data records of a specific type. Data records of all types are destaged to the global cache from the local caches or from the disk storage system. In accordance with an LRU algorithm, an LRU data record is demoted from the global cache to the local cache whose data type matches the data type of the demoted LRU record. When a local cache is full, an LRU record is destaged to the storage system. The cache hit rate is increased because the partitioning scheme can be designed to allocate more cache to data record types that are more frequently used. There is also a feature that permits logical and dynamic resizing of the partitions so that cache can be increased for more frequently used data types and concomitantly decreased for less frequently used data types.
Other prior art schemes increase the cache hit rate by eliminating data record duplications in cache. Typical schemes of this type are disclosed in U.S. Pat. Nos. 5,802,572 and 5,627,990.
DASD systems have been improved with the use of multiple small storage modules configured in geometries that assure data recovery in the event of a failure. These improved systems are frequently referred to as redundant arrays of inexpensive (or independent) disks (RAID). In some of these geometries, a data object is partitioned into data portions and each data portion is stored on a different one of the disks. In one geometry, known as RAID level 4, one of the disks is dedicated to storing parity for the data portions. The parity is used to reconstruct the data portion in the event of a failure. For write operations, this geometry requires two separate write accesses, one access to the disk upon which the data portion is stored and another access to the disk upon which the parity is stored.
In another geometry, known as RAID level 5, the disks are partitioned to distribute the data and parity information across the active disks in the array. Each partition is commonly referred to as a stripe. The parity information for a stripe is usually placed on one disk and the data is placed on the remaining disks of the stripe. The disk that contains parity information varies from stripe to stripe. This allows multiple stripes to be manipulated in parallel, thereby enabling rather large chunks of data to be staged or destaged.
The aforementioned schemes for increasing the cache hit rate are concerned with rather small data objects, such as a page, a table or the like. They do not take advantage of the ability of a RAID system to handle much larger objects of data, such as a stripe, that contains a large number of the smaller page objects.
Accordingly, there is a need for a cache memory that has an improved probability of cache hits. Especially, there is a need for a cache memory that takes advantage of the stripe accessing capabilities of a RAID storage device.
SUMMARY OF THE INVENTION
The present invention employs a host computer that runs applications that require data objects from a storage system. The storage system has a storage device, such as a disk storage device, and a cache memory. Data objects that are frequently used by the host computer are stored in the cache memory. The data objects are also stored in the storage device logically arranged in segments of data objects and groups of segments. The cache memory is logically partitioned into a first cache and a second cache.
The method of the present invention uses the first cache for storage of segments that have a small granularity and the second cache for storage of groups of segments that have a large granularity. When the host computer requests access to data, the method of the invention determines if the requested data is stored in the first cache. If the requested data is not stored in the first cache, the method determines if the requested data is stored in the second cache. If the requested data is not stored in the second cache, a group of segments stored in the storage device is accessed, the requested data being contained in one of these segments. The group of segments is then stored in the second cache and the first segment that includes the requested data is stored in the first cache. The requested data is then accessed from the first cache.
If the method determines that the requested data is stored in the second cache, but not in the first cache, a copy of the segment containing requested data is transferred to the first cache.
The method uses separate LRU procedures to control destaging of least recently used segments from the first cache and groups of segments from the second cache to allocate storage for requested data that is not stored in the first and second caches.
The logical partitioning of the cache memory into a first cache and a second cache together with storing segments in the first cache and groups in th
Bluestone, Esq. Randall J.
Elmore Stephan
International Business Machines - Corporation
Kim Matthew
Ohlandt Greeley Ruggiero & Perle LLP
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