Method and system for low noise integrated circuit design

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

06950997

ABSTRACT:
A method for designing an integrated circuit by a user, including: evaluating noise parameters for design elements of an integrated circuit design; determining if the noise parameters meet noise constraints of the integrated circuit design; and if the noise parameters do not meet the noise constraints, selecting alternative design elements having noise parameters that do meet the noise constraints.

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patent: 2004/0060016 (2004-03-01), Patra et al.
patent: 2004/0143804 (2004-07-01), Ueno et al.

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