Method and system for local memory addressing in single...

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules

Reexamination Certificate

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C711S202000, C711S211000, C712S022000, C345S571000

Reexamination Certificate

active

07490190

ABSTRACT:
A single instruction, multiple data (“SIMD”) computer system includes a central control unit coupled to 256 processing elements (“PEs”) and to 32 static random access memory (“SRAM”) devices. Each group of eight PEs can access respective groups of eight columns in a respective SRAM device. Each PE includes a local column address register that can be loaded through a data bus of the respective PE. A local column address stored in the local column address register is applied to an AND gate, which selects either the local column address or a column address applied to the AND gate by the central control unit. As a result, the central control unit can globally access the SRAM device, or a specific one of the eight columns that can be accessed by each PE can be selected locally by the PE.

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Blevins, D. W. et al., “BLITZEN: A Highly Integrated Massively Parallel Machine”, Proceedings of the 2ndSymposium on the Frontiers of Massively Parallel Computation, Oct. 1988, pp. 399-406.

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