Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
Patent
1995-10-17
1999-07-13
Chan, Eddie P.
Electrical computers and digital processing systems: memory
Addressing combined with specific memory configuration or...
For multiple memory modules
711157, G06F 1200
Patent
active
059241110
ABSTRACT:
A method and system for performing 2.sup.n -way interleaving of data words over P memory banks is disclosed. Each of the memory banks is partitioned into 2.sup.n partitions. The data word (pixel) address space is partitioned into P contiguous sequences. Each of the P sequences of data word addresses is associated with a unique group of 2.sup.n partitions. In each group, each partition is in a different memory bank. The data word addresses of each of the P sequences are then interleaved over the associated group of partitions. In interleaving the sequence of data word addresses, the data word addresses are alternately associated with sequential memory addresses in the group of partitions in a round-robin fashion. The method and system are particularly applicable where P is not a power of 2.
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Chia Wei-Kuo
Hsiao Jin-Han
Huang Chu-Kai
Chan Eddie P.
Verbrugge Kevin
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