Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region
Reexamination Certificate
2001-12-14
2003-12-23
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Introduction of conductivity modifying dopant into...
Ion implantation of dopant into semiconductor region
C438S221000, C438S223000, C438S224000, C438S229000, C438S296000, C438S424000, C438S433000
Reexamination Certificate
active
06667226
ABSTRACT:
BACKGROUND OF THE INVENTION
Trench isolation structures are used in semiconductor devices, to improve the operation of transistors and other elements of the semiconductor devices. As the need for smaller device size increases, the area dedicated to isolation spaces must be decreased. Conventional trench isolation techniques, however, require the use of relatively large isolation spaces. Consequently, the incorporation of trench isolation structures in semiconductor devices has posed challenges for semiconductor device fabrication.
SUMMARY OF THE INVENTION
While known approaches have provided improvements over prior approaches, the challenges in the field of semiconductor devices have continued to increase with demands for more and better techniques having greater effectiveness. Therefore, a need has arisen for a new method and system for integrating shallow trench and deep trench isolation structures in a semiconductor device.
In accordance with the present invention, a method and system for integrating shallow trench and deep trench isolation structures in a semiconductor device are provided that substantially eliminate or reduce the disadvantages and problems associated with previously developed systems and methods.
According to one embodiment of the present invention, a method for constructing a semiconductor device is disclosed. A deep trench isolation structure is formed proximate a surface of a semiconductor substrate. A deep trench plug layer is deposited within the deep trench isolation structure. A shallow trench isolation structure is formed where the deep trench isolation structure meets the surface of the semiconductor substrate. A shallow trench plug layer is deposited within the shallow trench isolation structure.
According to another embodiment of the present invention, a method for constructing a semiconductor device is disclosed. A shallow trench isolation structure is formed proximate a surface of a semiconductor substrate. The shallow trench isolation structure is etched to form a deep trench isolation structure where the shallow trench isolation structure meets the surface of the semiconductor substrate. A deep trench plug layer is deposited within the deep trench isolation structure. A shallow trench plug layer is deposited within the shallow trench isolation structure.
According to another embodiment of the present invention, a semiconductor device is disclosed that comprises a semiconductor substrate. A surface of the semiconductor substrate defines a deep trench isolation structure and a shallow trench isolation structure. The deep trench isolation structure meets the surface of the semiconductor substrate where the shallow trench isolation structure meets the surface. A deep trench plug is deposited within the deep trench isolation structure. A shallow trench plug is deposited within the shallow trench isolation structure.
Embodiments of the invention may provide numerous technical advantages. A technical advantage of one embodiment is that shallow trench isolation structures are formed outwardly from deep trench isolation structures. This configuration provides sufficient isolation of transistors, bipolar transistors, and other elements of a semiconductor device while using minimal surface area.
A technical advantage of another embodiment is that an over-etching process may be performed during formation of the shallow trench isolation structures in order to reduce formation of oxide or nitride spikes. A technical advantage of another embodiment is that the deep trench isolation structures are faceted. Faceted deep trench isolation structures have smoother sidewalls, which reduces peaks during formation of shallow trench isolation structures. Additionally, the faceting also allows for easier deposition of material into deep trench isolation structures during formation of deep trench plugs.
Other technical advantages are readily apparent to one skilled in the art from the following figures, descriptions, and claims.
REFERENCES:
patent: 5504033 (1996-04-01), Bajor et al.
patent: 5943578 (1999-08-01), Katakabe et al.
patent: 6255184 (2001-07-01), Sune
patent: 6287930 (2001-09-01), Park
patent: 6448124 (2002-09-01), Coolbaugh et al.
Howard Gregory E.
Pinto Angelo
Romani Ricardo A.
Brady III W. James
Isaac Stanetta
McLarty Peter K.
Niebling John F.
Telecky , Jr. Frederick J.
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