Method and system for integrated circuit backside navigation

Details Method and system for integrated circuit backside navigation Method and system for integrated circuit backside navigation

2006-11-14

2006-11-14

Ahmed, Shamim (Department: 1765)

Etching a substrate: processes

Gas phase etching of substrate

With measuring, testing, or inspecting

C216S060000, C216S063000, C216S066000, C250S492300, C438S014000, C438S016000, C438S017000, C204S192330, C700S121000

Reexamination Certificate

active

07135123

ABSTRACT:
The backside navigation method of the present invention includes milling a fiducial opening through the substrate of an integrated circuit. The milling process is stopped when the fiducial opening reaches the bottom of a trench isolation structure. The trench isolation structure delineated by the fiducial opening may be imaged and registered to a computer aided design layout image to achieve sub-micron navigation resolution.

REFERENCES:
patent: 5948217 (1999-09-01), Winer et al.
patent: 6518571 (2003-02-01), Talbot et al.
patent: 6855622 (2005-02-01), Le Roy et al.
patent: 6958248 (2005-10-01), Roy et al.

Affiliated with

Also associated with

Rating

Method and system for integrated circuit backside navigation does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and system for integrated circuit backside navigation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and system for integrated circuit backside navigation will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3693100