Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2007-05-01
2007-05-01
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S796000
Reexamination Certificate
active
10248644
ABSTRACT:
A data driven clock recovery system comprising a viterbi detector for detecting data and tentatively deciding the closest approximation, and a circuit for retrieving the tentative decision in stages. Preferably, the clock recovery system further comprises a combination series-parallel comparison circuit for selecting one value of a set of values for input to the viterbi and for applying said one value to the viterbi.
REFERENCES:
patent: 5418795 (1995-05-01), Itakura et al.
patent: 5446746 (1995-08-01), Park
patent: 5450338 (1995-09-01), Oota et al.
patent: 5530707 (1996-06-01), Lin
patent: 5881075 (1999-03-01), Kong et al.
patent: 6304612 (2001-10-01), Baggen et al.
patent: 6415415 (2002-07-01), Karabed
Stephen B. Wicker, Error Control Systems for Digital Communication and Storage, 1995, Prentice Hall, pp. 314-327.
Allen Brian L.
Haar Allen P
Chaudry Mujtaba
De'cady Albert
LeStrange, Esq. Michael J.
Scully , Scott, Murphy & Presser, P.C.
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