Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1997-08-01
1998-08-18
Voeltz, Emanuel Todd
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711202, 711206, 711 3, G06F 1210
Patent
active
057969892
ABSTRACT:
An emulation system contains reorganized instruction code sequences for a computer, so that the native code which is used to emulate instructions that occur most frequently in a typical environment are grouped together, to thereby minimize instruction cache conflicts. A representative set of programs which operate with the emulated code are run, and statistics are recorded to determine the most frequently occurring emulated instructions. The native code which emulates these most frequently occurring instructions is then arranged so that the portions of the code are statically stored in main memory at consecutive memory locations. As a result, when the native code for a frequently occurring emulated instruction is loaded from the memory into the cache, the likelihood that the cache will contain the native code for subsequent emulated instructions is maximized, and the likelihood of cache conflicts is minimized.
REFERENCES:
patent: 5303377 (1994-04-01), Gupta et al.
patent: 5392408 (1995-02-01), Fitch
McFarling, Scott, "Procedure Merging with Instruction Caches", Proceedings of the ACM SIGPLAN '91 Conference on Programming Language Design and Implementation, Jun. 26-28, 1991, pp. 71-79.
Himelstein Mark I.
Morley John E.
Apple Computer Inc.
Siek Vuthe
Todd Voeltz Emanuel
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