Method and system for improving yield of an integrated circuit

Details Method and system for improving yield of an integrated circuit Method and system for improving yield of an integrated circuit

2006-02-23

2009-02-17

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

07493574

ABSTRACT:
Method and system for improving yield of an integrated circuit are disclosed. The method includes optimizing a design of the integrated circuit according to a set of predefined design parameters to generating design points that meet a set of predefined design specifications, analyzing the design points to form clusters comprising the design points, determining a representative design point from the clusters comprising the design points, running a statistical simulation to determine a yield of the design using the representative design point and a statistical model of manufacturing process variations, generating statistical corners in accordance with results of the statistical simulation, and optimizing the design in accordance with the statistical corners using an iterative process.

REFERENCES:
patent: 6757873 (2004-06-01), Yamaguchi
patent: 2003/0066034 (2003-04-01), Gross et al.
patent: 2004/0073879 (2004-04-01), Chen et al.
patent: 2005/0257178 (2005-11-01), Daems et al.
patent: 2007/0180411 (2007-08-01), Swegat et al.

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