Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2006-11-21
2006-11-21
Bataille, Pierre (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S165000, C365S185330
Reexamination Certificate
active
07139863
ABSTRACT:
A method, system and apparatus for improving the useful life of non-volatile memory devices such as flash memory. The present wear-leveling technique advantageously improves the overall useful life of a flash memory device by strategically moving inactive data (data that has been infrequently modified in the recent past) to the memory blocks that have experienced the most wear since the device began operation and by strategically moving active data to the memory blocks that have experienced the least wear. In order to efficiently process and track data activity and block wear, vectors of block-descriptor pointers are maintained. One vector is sorted in decreasing order of overall block erase/write activity (block-wear indicator), whereas the other vector is sorted in increasing order of the number of times a block has been erased since the last wear-leveling event occurred (activity indicator for the data stored in the block). The activity levels of the data and the wear levels of the blocks are then easily compared and otherwise processed using pointers into these vectors to allow for more efficient processing than previous techniques used for wear leveling.
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Defouw Richard John
Nguyen Thai
Bataille Pierre
Brooks & Kushman P.C.
Storage Technology Corporation
Tsai Sheng-Jen
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