Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-07-11
2006-07-11
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
07076749
ABSTRACT:
A method and a system for improving manufacturing productivity of an integrated circuit. The method including: (a) generating a set of physical design rules, (b) assigning a rule scoring equation to each physical design rule of the set of physical design rules; (c) checking a physical design of the integrated circuit for deviations from each design rule; (d) computing a score for each physical design rule, using the corresponding rule scoring equation assigned to each physical design rule, for which one or more deviations were found in step (c); and (e) computing a productivity score for the integrated circuit design based on the scores computed in step (d).
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Holden et al., “Predicting Assembly Costs Before Design with the Design Report Card”, Emerging Technologies Conference, Nov. 16, 1998.
Gold et al., “A Quantitative Approach to Nonlinear Process Design Rule Scaling”, 18th Conference on Advanced Research in VLSI (ARVLSI '99), Mar. 21-24, 1999, Atlanta, GA, USA, IEEE Computer Society 1999.
Kemerer Douglas W.
Maynard Daniel N.
Tellez Gustavo E.
Wang Lijiang L.
Wissell Peter S.
Bowers Brandon
Chiang Jack
Kotulak Richard M.
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