Electrical computers and digital data processing systems: input/ – Interrupt processing
Reexamination Certificate
2006-05-09
2006-05-09
Ray, Gopal C. (Department: 2111)
Electrical computers and digital data processing systems: input/
Interrupt processing
C370S467000, C370S912000, C710S052000, C710S105000
Reexamination Certificate
active
07043583
ABSTRACT:
A method of processing a frame of a CPU intensive communications protocol includes disabling per frame interrupts of a CPU; enabling a periodic interrupt handler to interrupt the CPU upon an interrupt period; and upon an interrupt of the periodic interrupt handler, determining and processing a frame received in the interrupt period. Further, a frame sent acknowledgment stored in the interrupt period may be processed during the interrupt. A method of processing the transmission of frames of a CPU intensive communications protocol includes, when no MSU frame is queued for transmission, sending FISU frames that each point to itself; and if a MSU frame is queued for transmission, updating the MSU frame to point to a new FISU frame, updating a current FISU frame to point to the MSU frame, and sending the current FISU frame, the MSU frame and the new FISU frame.
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Intel Corporation
Pillsbury Wintrop Shaw Pittman LLP
Ray Gopal C.
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