Method and system for implementing cached parameterized cells

Details Method and system for implementing cached parameterized cells Method and system for implementing cached parameterized cells

2011-06-28

2011-06-28

Whitmore, Stacy A (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

Testing or evaluating

C711S113000, C709S213000

Reexamination Certificate

active

07971175

ABSTRACT:
Parameterized cells are cached and provided by the plug-in to increase the speed and efficiency of an application for circuit design. This allows source design to be read-interoperable and also enables some basic write-interoperability in the source design.

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