Method and system for high bandwidth fault tolerance in a...

Details Method and system for high bandwidth fault tolerance in a... Method and system for high bandwidth fault tolerance in a...

2007-07-03

2007-07-03

Beausoliel, Robert (Department: 2113)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S005110, C714S013000, C714S043000, C714S052000

Reexamination Certificate

active

10853040

ABSTRACT:
The present invention is directed to a method and system for high bandwidth fault tolerance in a storage system while the system, maintaining dual parity scheme, may tolerate the failure of more than one disk. An array controller may comprise a parity buffer sufficiently large enough to hold all of the parity blocks for an entire stripe of data. This may provide for high bandwidth fault tolerance without reading the source blocks twice while the dual parity values are calculated using two different/independent parity computations for a given stripe. Such a dual parity scheme may allow the storage system to tolerate the failure of more than one disk.

REFERENCES:
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patent: 6453428 (2002-09-01), Stephenson
patent: 6792391 (2004-09-01), Nanda
patent: 6851082 (2005-02-01), Corbett
patent: 6993701 (2006-01-01), Corbett et al.
patent: 7073115 (2006-07-01), English et al.
patent: 7080278 (2006-07-01), Kleiman et al.
patent: 7085953 (2006-08-01), Hsu et al.
patent: 2005/0050384 (2005-03-01), Horn

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