Method and system for handling interrupts and other...

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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C710S260000

Reexamination Certificate

active

07099984

ABSTRACT:
A computing system comprises two or more processing sets, for example for fault tolerant operation. The multiple processing sets have a connection to at least one device, typically many devices. The ownership of each device is allocated to one of the two or more processing sets. When an interrupt is generated within a device, this is transmitted from the device to the processing set to which ownership of the device has been allocated, but not to the remaining processing sets. In addition, a command for a device may be generated by a processing set. However, receipt of this command by the device is disabled if the processing set that generated the command has not been allocated ownership of the device.

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The I2C Bus Specification, Version 2.1, Jan. 2000, pp. 1-46.
International search report application No. GB0206453.3 mailed Oct. 30, 2002.

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