Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
Reexamination Certificate
1999-02-27
2001-09-04
Baker, Stephen M. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Error/fault detection technique
C714S056000
Reexamination Certificate
active
06286125
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to data communication between senders and receivers over a bus, and in particular to transferring error detection information for data transmitted between senders and receivers over a bus.
BACKGROUND
In many data communication systems, data sender and receiver devices are interconnected via a bus and data is transferred between those devices over the bus by a predetermined communication protocol. However, due to noise and protocol errors, not all of the data transmitted from a sender to a receiver is always received error free. To provide error detection and error correction, many conventional data communication systems utilize communication protocols wherein individual data bytes transmitted from a sender to a receiver over a data bus are provided with parity bits.
However, a parity bit for a data byte only protects against single-bit errors in the data byte. If there are two or more bit errors in the data bytes, the parity bit does not provide information for detecting and correcting those errors. Further, a parity bit scheme do not provide any error protection for a stream of data bytes transmitted from a sender to a receiver. Nor does a parity bit scheme provide any protection for protocol errors in which an entire data byte or word is dropped or repeated. For example, in a communication system utilizing a SICS bus protocol, handshake signals between a sender and a receiver are used to clock the bus in asynchronous mode. However, noise on the handshake signals can cause their misinterpretation at the receiver, and result in either missing or double clocking whereby data bytes are lost or repeated.
Conventional error detection schemes for alleviating the above shortcomings require substantial changes in existing data communication protocols in order to provide error detection for data transmitted from a sender to a receiver. For example, the SCSI bus protocol is primarily utilized for communication between an initiator device, such as host device, and several target devices, such as peripheral storage devices. The SCSI protocol is “target driven” wherein each target device determines the bus phase and direction of data transfer from the target to the initiator, or from the initiator to the target. Convention error detection schemes for the SCSI bus protocol either require changing the nature of the SCSI protocol from “target driven” to “initiator driven”, or require both the target and the initiator to know the nature and location of error detection information for the data transmission in advance of transmission over the bus.
There is, therefore, a need for a method of adding error detection information to data transferred between a sender and a receiver over a bus, which provides protection for multiple data bit errors. There is also a need for such a method to provide error detection protection for a stream of data. There is also a need for such a method to not require a change in the data communication protocol over the bus such as in a SCSI bus protocol.
SUMMARY
The present invention satisfies these needs. In one embodiment, the present invention provides a method of providing error detection information for data transfer in a data communication system including a sender device and a receiver device interconnected via a bus, such as a SCSI bus. According to an embodiment of the present invention, the sender: (1) transmits data to the receiver on the bus, (2) generates error detection information for the transmitted, (3) transmits a notification signal to the receiver to indicate start of error detection information transfer, and (4) transmits the error detection information to the receiver on the bus. The notification signal allows the receiver to distinguish the error detection information from the transmitted data, and identify the error detection information corresponding to the transmitted data. The receiver generates error detection information for data received from the sender, and compares the receiver generated error detection information to the error detection information received from the sender. If there are one or more mismatches, the receiver posts an error condition. The sender and the receiver utilize the same process for generating error detection information, such as a multi-bit cyclic redundancy check (CRC) sum for the transmitted data.
In a data communication system comprising a peripheral device and a host device coupled to a bus, the host device and the peripheral device can utilize asynchronous or synchronous transmission protocols for exchange of information over the bus. In one embodiment, the transmission protocol can be symmetric wherein the protocol for data transfer from the host device to the peripheral device over the bus is the same as the protocol for data transfer from the peripheral device to the host device. In the former case the host device is the sender and the peripheral device is the receiver, and in the latter case the peripheral device is the sender and the host device is the receiver.
For either case, in asynchronous mode the protocol comprises an interlock handshaking routine including the steps of: for each data unit, the sender placing a data unit on the bus and transmitting a request signal to the receiver to signal the receiver of the data unit on the bus, and the receiver latching the data unit from the bus upon receiving the request signal and transmitting an acknowledge signal to the receiver. This interlock handshake is repeated for each data unit transmitted from the sender to the receiver in the asynchronous mode. After the sender transmits a desired number of data units to the receiver, the sender then transmits the error detection information units generated for the transmitted data. The sender and the receiver follow the same handshake interlock routine for transmission of error detection information units from the sender to the receiver over the bus. The notification signals inform the receiver that the information units received over the bus form error detection information for the data bytes transmitted from the sender to the receiver.
In synchronous mode, an interlocking handshake is not utilized. The sender sequentially places one or more data units on the bus and for each data unit transmits a corresponding request signal to the receiver to signal the receiver of the data unit on the bus. After transmitting a number data units upto a desired number, the sender begins transmitting the error detection information units to the receiver by sequentially placing the information units on the bus, and for each information unit, transmitting a corresponding request signal and a corresponding notification signal to inform the user that the information units are on the bus and are error detection data. The receiver sequentially latches each data unit from the bus in response to the corresponding request signal. Similarly, the receiver sequentially latches each information unit from the bus in response to the corresponding request signal, and later transmits an acknowledge signal to the receiver for each request signal received.
In another embodiment, the transmission protocol can be asymmetric wherein the protocol for data transfer from the peripheral device to the host device is different than that for data transfer from the host device to the peripheral device. In the former case the peripheral device is the sender and the host device is the receiver, and in the latter case the host device is the sender and the peripheral device is the receiver. In asynchronous mode for data transfer from the host device to the peripheral device, the protocol comprises an interlock handshaking routine including the steps of: the peripheral device transmitting a request signal to the host device requesting data, the host device transmitting data to the peripheral device on the bus in response to the request signal, the peripheral device transmitting a notification signal to the host device requesting error detection information for said data, the host device generating error detec
Hall Dana
Leshay Bruce A.
McGrath Jim
Baker Stephen M.
Maxtor Corporation
Zarrabian Michael
LandOfFree
Method and system for generating and transferring error... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and system for generating and transferring error..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and system for generating and transferring error... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2487163