Method and system for flexible clock gating control

Details Method and system for flexible clock gating control Method and system for flexible clock gating control

2004-09-01

2008-10-14

Perveen, Rehana (Department: 2116)

Electrical computers and digital processing systems: support

Computer power control

Power conservation

Reexamination Certificate

active

07437583

ABSTRACT:
Distributing clock signals within an electronic device may comprise determining a status of at least one gate that controls flow of a clock signal to at least one device coupled to the gate. One or more of the gates may be controlled based on this determined status and it may be determined whether the devices coupled to the gate are active or inactive. One or more gates that control the flow of the clock signal to the device may be turned OFF if the device is inactive. The status of one or more of the gates may be read from one or more registers mapped to the gates. One or more gates that control one or more active devices may be prevented from being deactivated based on the determined status of the gates. A current hardware setting of a gate may be overridden via software control.

REFERENCES:
patent: 6920572 (2005-07-01), Nguyen et al.
patent: 6938176 (2005-08-01), Alben et al.
patent: 6971038 (2005-11-01), Santhanam et al.
patent: 7290158 (2007-10-01), Shikata

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