Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2006-06-13
2006-06-13
McLean-Mayo, Kimberly (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S170000, C711S173000
Reexamination Certificate
active
07062604
ABSTRACT:
A two-dimensional parity method and system that provides five-disk fault tolerance in an array of disks, such as a RAID system. In an N×M logical representation of data in an array of disks, the method includes arranging strips containing data into two groups of stepped parity sets, the first group organized in a stepped configuration proceeding in one generally diagonal direction, the second group organized in a stepped configuration proceeding in another generally diagonal direction. Parites for respective parity sets in each group are calculated and stored in respective disks and stripes of the array. The method also includes arranging strips into horizontal and diagonal parity sets. In the event of up to five simultaneous disk failures, lost data can be reconstructed by using the corresponding stored horizontal, diagonal, and stepped parity information and the data stored on the remaining intact disks.
REFERENCES:
patent: 5499253 (1996-03-01), Lary
patent: 6148430 (2000-11-01), Weng
patent: 6327672 (2001-12-01), Wilner
patent: 6353895 (2002-03-01), Stephenson
Adaptec, Inc.
Beusse James H.
Beusse Wolter Sanks Mora & Maire, P.A.
McLean-Mayo Kimberly
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