Method and system for enhancing the endurance of memory cells

Details Method and system for enhancing the endurance of memory cells Method and system for enhancing the endurance of memory cells

2006-07-25

2006-07-25

Verbrugge, Kevin (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S103000, C711S156000, C711S154000, C365S185330

Reexamination Certificate

active

07082490

ABSTRACT:
An integrated circuit device includes a plurality of non-volatile memory cells associated with a plurality of flag cells storing managing data. The managing data of the flag cells forms a data set. The data set is utilized to determine to which memory cell of the plurality of memory cells to write new data and from which of the memory cells to read currently stored data. The data set is changed to a different data set whenever a new value is written to a designated memory cell to indicate an alternate memory cell to be written to next and an alternate memory cell to be read from next. The data set may be changed by alternately writing a new value to a different flag cell in each successive change of the data set.

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