Method and system for emulating content-addressable memory...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition

Reexamination Certificate

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C711S104000

Reexamination Certificate

active

07380053

ABSTRACT:
A method and system for emulating content-addressable memory (CAM) primitives (e.g., a read operation) is disclosed. According to one embodiment, a method is provided for emulating a read operation on a plurality of CAM elements utilizing a read input including match input data and a CAM element selection index. In the described method, match reference data is distributed among a plurality of random-access memory (RAM) elements by storing match reference data corresponding to each of the plurality of CAM elements within a first RAM element of the plurality. Thereafter, a first record is identified within the first RAM element utilizing a first portion of the match input data and the CAM element selection index. A read operation result is then generated utilizing the first record.

REFERENCES:
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patent: 6351143 (2002-02-01), Guccione et al.
patent: 6353332 (2002-03-01), Brelet
patent: 6754766 (2004-06-01), Schlacter
patent: 6781857 (2004-08-01), Lien et al.
Lattice Semiconductor Corporation,Content Addressable Memory(CAM)Applications for ispXPLD™ Devices; AN8071; Jul. 2002; pp. 1-9.
Brelet, Jean-Louis, XILINX,An Overview of Multiple CAM Designs in Virtex Family Devices; XAPP 201, Sep. 23, 1999 (v1.1); pp. 1-6.
Defossez, Marc, XILINX,Content Addressable Memory(CAM)in ATM Applications; XAPP202, Sep. 23, 1999 (v1.1); pp. 1-14.
Brelet, Jean-Louis and New, Bernie, XILINX,Designing Flexible, Fast CAMs with Virtex Family FPGAs; XAPP203, Sep. 23, 1999 (v1.1); pp. 1-17.
Brelet, Jean-Louis, XILINX,Using Block RAM for High Performance Read/Write CAMs; XAPP204, May 2, 2000 (v1.2); pp. 1-19.
Brelet, Jean-Louis and Gopalakrishnan, Lakshmi, XILINX,Using Virtex-II Block RAM for High Performance Read/Write CAMs; XAPP260, Feb. 27, 2002 (v1.1); pp. 1-12.

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