Method and system for dynamic duration burn-in

Data processing: measuring – calibrating – or testing – Testing system – Of circuit

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C324S760020

Reexamination Certificate

active

06175812

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to integrated circuit testing, and in particular, to the efficient burn-in testing of integrated circuits.
BACKGROUND OF THE INVENTION
Photo-printing and etching are two methods used to fabricate integrated circuits (IC's). Such IC's can be SRAMs, DRAMs or other types of memory units. In photolithography, hundreds of dice are manufactured from a single wafer. After the dice are formed on the wafer, the wafer is segmented into individual units and encapsulated to form a set of packaged ICs.
Unfortunately, a percentage of the IC parts are defective. Some of these parts have defects from the manufacturing process. Others will malfunction within a short period of use. These imperfect ICs which malfunction after a short period of use are the “infant mortalities.” Within a mature product line, a relatively small percentage of failures will be infant mortalities. However, for a newer, immature product line, the percentage of failures could be significant. It is important to isolate these infant mortalities so that they can be discarded prior to sale, because the presence of devices destined to become infant mortalities decreases the overall reliability of the IC population. To weed out the infant mortalities, a type of stress testing, called burn-in, is used.
In the burn-in test process, ICs are subjected to a high level of stressful conditions, including high temperatures and high voltage. During a typical burn-in test, thousands of ICs are inserted in burn-in boards, which allow electrical connectivity to the individual ICs. These burn-in boards are then placed in ovens, which raise the operating temperature of the ICs. The batch of ICs in the oven are stressed for a long period of time and then tested. For example, the temperature in the burn-in ovens may be raised to 125° Celsius, whereby the part's operating temperature specification may be no more than 70° Celsius. As additional stress, 7 volts may be applied to the ICs rather than the standard 5 volts.
Traditionally, after an extended period of time, perhaps 24 or more hours, the ICs are removed from the oven and are tested to determine if hard fail mechanisms were present. These are the infant mortalities. Although it is very important to find the infant mortalities in a batch of ICs, burn-in testing is time consuming and costly. The burn-in testing equipment requires a large facility in order to test a large number of ICs. The stressful conditions—heat and electricity—require a substantial amount of power, thus requiring an enormous capital outlay. Testing each IC for such an extended period of time also increases production cycle time.
This traditional type of burn-in testing can be referred to as “Blind Burn-In.” In Blind Burn-In, all of the ICs loaded in the burn-in ovens are subjected to the stressful conditions for the same predetermined length of time. The length of time in the ovens must be long enough so that the infant mortalities can be identified. For those ICs which are not infant mortalities, time spent in the ovens is essentially wasted. And for those infant mortalities themselves, the time spent in the ovens past their failure point is also wasted overhead. Unfortunately, in Blind Burn-In, it is not possible to determine the exact point the infant mortalities occurred. So, to ensure that all infant mortalities are detected, the burn-in time must be extended.
A second type of burn-in testing can be called “Monitored Burn-In.” In a Monitored Burn-In arrangement, the ICs are stressed and then tested at regular intervals. After burn-in is completed for a batch of IC parts, the data acquired at each interval is analyzed. Using this data, testing engineers can determine the length of time sufficient in that particular batch of ICs to weed out the infant mortalities. However, since each batch of ICs may be from more or less mature product lines, or since each batch of ICs contain parts fabricated from different machines, having different successful yield rates, the data acquired during Monitored Burn-In testing is not highly useful for subsequent batches of ICs. Because of this, many parts must endure unnecessary lengths of burn-in duration.
What is needed is a method for acquiring test data in real-time and using that data to optimize the burn-in testing process. The method should allow test engineers to be able to burn-in and test a batch of IC parts only for that length of time for which the infant mortalities are detected. A method such as this could significantly cut burn-in test cycle time as well as save both labor and equipment costs. Use of this method would also increase yields and reduce the need for retesting, since ICs would only be subjected to the amount of highly stressful conditions necessary for the detection of infant mortalities. This method would also provide more immediate feedback to previous manufacturing entities.
SUMMARY OF THE INVENTION
A computer-implemented method and system for dynamic duration burn-in. A computer system is provided having a processing unit, input device and storage. The storage includes a performance database for tracking burn-in test results of a plurality of ICs. Test criteria is determined against which the burn-in test results will be compared. The plurality of ICs are stressed for a burn-in interval. The plurality of ICs are tested to determine a failure rate from burn-in. The failure rate is compared to the test criteria. The steps of stressing, testing and comparing are repeated until the failure rate fulfills the test criteria.


REFERENCES:
patent: 4660282 (1987-04-01), Pfaff
patent: 4926117 (1990-05-01), Nevill
patent: 5180974 (1993-01-01), Mitchell et al.
patent: 5267395 (1993-12-01), Jones, Jr. et al.
patent: 5279975 (1994-01-01), Devereaux et al.
patent: 5315598 (1994-05-01), Tran
patent: 5440241 (1995-08-01), King et al.
patent: 5461328 (1995-10-01), Devereaux et al.
patent: 5534786 (1996-07-01), Kaneko et al.
patent: 5539324 (1996-07-01), Wood et al.
patent: 5541524 (1996-07-01), Tuckerman et al.
patent: 5557559 (1996-09-01), Rhodes
patent: 5559444 (1996-09-01), Farnworth et al.
patent: 5570032 (1996-10-01), Atkins et al.
patent: 5578934 (1996-11-01), Wood et al.
patent: 5642073 (1997-06-01), Manning
patent: 5726920 (1998-03-01), Chen et al.
patent: 5761064 (1998-06-01), La et al.
patent: 5787021 (1998-07-01), Samaha
patent: 5831445 (1998-11-01), Atkins et al.
patent: 5907492 (1999-05-01), Akram et al.
patent: 5935264 (1999-08-01), Nevill et al.
patent: 5940300 (1999-08-01), Ozaki

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method and system for dynamic duration burn-in does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and system for dynamic duration burn-in, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and system for dynamic duration burn-in will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2506563

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.