Method and system for determining required quantity of...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000

Reexamination Certificate

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07496873

ABSTRACT:
A method and system is proposed for determining the required quantity of testing points on a circuit layout diagram generated by a computer-aided circuit layout design program on a computer platform. The proposed method and system is characterized by the use of a graphic file scanning method for finding and totaling the number of all the electrical connecting points associated with each electronic component in the circuit layout diagram, whereby the required quantity of testing points is determined based on the total of the electrical connecting points. The determined quantity of testing points is then informed to the user by displaying it in a human-readable form on the computer platform. This feature allows circuit layout design to be less laborious and time-consuming and thus more efficient than prior art.

REFERENCES:
patent: 2001/0039644 (2001-11-01), Le Coz
patent: 2004/0139407 (2004-07-01), Mukai et al.

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