Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2006-09-28
2009-06-23
Peugh, Brian R (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
Reexamination Certificate
active
07552298
ABSTRACT:
Certain aspects of a method and system for deferred pinning of host memory for stateful network interfaces are disclosed. Aspects of a method may include dynamically pinning by a convergence network interface controller (CNIC), at least one of a plurality of memory pages. At least one of: a hypervisor and a guest operating system (GOS) may be prevented from swapping at least one of the dynamically pinned plurality of memory pages.
REFERENCES:
patent: 7058772 (2006-06-01), Kuwabara et al.
patent: 7308544 (2007-12-01), Kuwabara et al.
Broadcom Corporation
McAndrews Held & Malloy Ltd.
Peugh Brian R
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