Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2006-03-14
2006-03-14
Anderson, Matthew D. (Department: 2186)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S103000
Reexamination Certificate
active
07013376
ABSTRACT:
A method and system for enhancing the reliability of a solid-state storage device based on electronic memory. The electronic memory is organized into low-address and high-address spare table regions, low-address and high-address spare page regions, and a large data page region. Data blocks within the memory are specified by accessing devices using a logical data block address, including a page index and a data block index. The page index selects a particular spare table, a particular spare page, and a particular data page. The data block index selects a spare table element within the spare table, and a data block within a data page. When an LDBA has been remapped, information in a corresponding spare table element is used to locate a physical block within a spare page.
REFERENCES:
patent: 5907856 (1999-05-01), Estakhri et al.
patent: 5933852 (1999-08-01), Jeddeloh
patent: 6000006 (1999-12-01), Bruce et al.
patent: 6149316 (2000-11-01), Harari et al.
patent: 6269432 (2001-07-01), Smith
patent: 6397292 (2002-05-01), Venkatesh et al.
patent: 6535995 (2003-03-01), Dobbek
Anderson Matthew D.
Patel Hetul
LandOfFree
Method and system for data block sparing in a solid-state... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and system for data block sparing in a solid-state..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and system for data block sparing in a solid-state... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3565155