Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-07-19
2005-07-19
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
06920620
ABSTRACT:
In a computer-implemented method and system for creating a test component layout, after creating a reference component layout that is composed of a set of polygonal working shapes, a plurality of shape parameters are defined for the working shapes of the reference component layout, and a parameter template is formed based on the shape parameters of the reference component layout. Thereafter, user-defined distance values corresponding to the shape parameters may be inputted into the parameter template, and the test component layout is automatically created by adjusting geometry of the working shapes of the reference component layout with reference to the user-defined distance values inputted into the parameter template.
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patent: 6457163 (2002-09-01), Yang
patent: 6480995 (2002-11-01), Schmidt et al.
patent: 6523162 (2003-02-01), Agrawal et al.
Hsiao Hung-Lin
Wang Jui-Chien
Dinh Paul
Siek Vuthe
Smith-Hill and Bedell
Springsoft, Inc.
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