Method and system for copper interconnect formation

Details Method and system for copper interconnect formation Method and system for copper interconnect formation

1997-10-20

2002-06-04

Hiteshew, Felisa (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S720000, C438S724000, C438S734000, C438S735000, C438S737000, C438S738000, C438S739000, C438S740000, C438S742000

Reexamination Certificate

active

06399505

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to semiconductor processing and more particularly to a method and system for reducing the contamination due to copper interconnect formation.
BACKGROUND OF THE INVENTION
Copper interconnects can be formed during semiconductor processing. In forming copper interconnects, a trench is first provided in the silicon substrate. Next, a barrier metal is typically deposited to prevent the copper to be used in an interconnect or via from migrating. Then, copper plating is performed, filling the trench and providing the interconnect.
Typically, the barrier metals that are used also work as a seed layer for copper. Such barrier metals are used to allow the growth of the copper on the barrier metal in the trench or the via. If barrier metals which cannot act as a seed layer are used, the copper will not properly grow in the trench or via unless a separate seed layer is provided.
Although the above process forms copper interconnects, the barrier metal is deposited at the edge and rear of the silicon substrate as well as in the trenches or vias. Because the barrier metal acts as a seed layer for copper, a copper film also develops at the edge and rear of the substrate during copper plating. Because this copper film is thin, it does not adhere well to the silicon substrate and peels during processing. Pieces of the peeled copper film may then contaminate the circuitry formed towards the center of the silicon substrate.
Accordingly, what is needed is a system and method for providing copper interconnects and vias without introducing copper contamination due to films formed at the edge of the substrate. The present invention addresses such a need.
SUMMARY OF THE INVENTION
The present invention provides a method and system for reducing contamination in a semiconductor device formed on a substrate. A first portion of the barrier metal layer is thinner than a second portion of the barrier metal layer. The method and system further comprise removing the first portion of the barrier metal layer.
According to the system and method disclosed herein, the present invention reduces copper contamination, thereby increasing overall system performance.


REFERENCES:
patent: 4931410 (1990-06-01), Tokunaga et al.
patent: 5227337 (1993-07-01), Kadomura
patent: 5407763 (1995-04-01), Pai
patent: 5420071 (1995-05-01), Burke
patent: 5824599 (1998-10-01), Schacham-Diamand et al.
patent: 5854134 (1998-12-01), Lan et al.

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