Method and system for converting netlist of integrated...

Details Method and system for converting netlist of integrated... Method and system for converting netlist of integrated...

2005-10-24

2008-05-27

Siek, Vuthe (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

07380223

ABSTRACT:
The present invention provides a method for converting a netlist of an integrated circuit from a first library to a second library. The first library may include logic cells AND, OR and NOT, and the second library may include logic cells NAND and NOR. The method includes steps as follows. Logic cells of the netlist are topologically sorted from outputs to inputs. AND and OR cells of the netlist are replaced with NOT, NAND and NOR cells. Simplification of the netlist is performed in a topological order.

REFERENCES:
patent: 4703435 (1987-10-01), Darringer et al.
patent: 5257201 (1993-10-01), Berman et al.
patent: 5311442 (1994-05-01), Fukushima
patent: 6587990 (2003-07-01), Andreev et al.
patent: 6848094 (2005-01-01), Andreev et al.
patent: 7082587 (2006-07-01), Chen et al.

Affiliated with

Also associated with

Rating

Method and system for converting netlist of integrated... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and system for converting netlist of integrated..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and system for converting netlist of integrated... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3981950