Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate
2007-06-26
2007-06-26
Lam, David (Department: 2827)
Static information storage and retrieval
Read/write circuit
Data refresh
C365S189120, C365S230030
Reexamination Certificate
active
11056486
ABSTRACT:
A memory system for controlling memory refresh is provided. An embodiment of the memory system includes a memory configured to operate in a self-refresh mode and an auto-refresh mode, the memory having a plurality of memory locations, and a memory controller configured to access a first one of the memory locations while a second one of the memory locations is being refreshed in the auto-refresh mode. Another embodiment of the memory system includes a memory that can communicate its self refresh address to the memory controller. A further embodiment includes a memory controller that can communicate an auto-refresh address to a memory.
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Agusta Joseph
Lam David
Pauley Nicholas
Qualcomm Incorporated
Rouse Thomas
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