Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Patent
1995-03-07
1996-11-05
Chin, Stephen
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
H04L 700, H04L 2536, H04L 2540
Patent
active
055725562
ABSTRACT:
In a method of controlling reproduction of a sampling clock signal, a transmission path clock signal is extracted from the transmission signal. The transmission signal is transmitted with the transmission path clock signal and includes a digital data and a transmission frequency difference data indicative of the difference in frequency between a sampling clock signal and the transmission path clock signal on a transmitting side. The digital data is written in the buffer memory in response to the extracted transmission path clock signal. A start timing of a reproduced sampling clock signal is detected and a phase control signal is generated based on the detected start timing. A reception frequency difference data is produced indicative of a difference in frequency between the extracted transmission path clock signal and the reproduced sampling clock signal such that a frequency control signal is generated based on the transmission frequency difference data and the reception frequency difference data. The sampling clock signal reproduced in response to the phase control signal and the frequency control signal such that the digital data can be read out from the buffer memory with controlled frequency and phase.
REFERENCES:
patent: 5359605 (1994-10-01), Urbansky et al.
patent: 5367545 (1994-11-01), Yamashita et al.
patent: 5479457 (1995-12-01), Waters
Chin Stephen
NEC Corporation
Phan Hai H.
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