Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate
1998-07-08
2001-10-23
Banankhah, Majid A. (Department: 2151)
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
C711S148000, C711S154000
Reexamination Certificate
active
06308243
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to an exclusive control method for a computer system, more particularly, a method of giving the right to one single task for exclusively using one of shared resources which are shared by a number of tasks (or processes), and to a computer system employing the exclusive control method.
In a variety of application apparatuses having embedded microcomputers, a real time multitask system is used for processing a number of tasks. In such multitask system, in the case where plural tasks use one resource (shared resource such as a hard disk drive), state of the resource (storing contents when the resource is a hard disk drive) is destroyed by accessing from plural tasks without control. It is thus necessary for the multitask system to exclusively control over the access of the plural tasks to one resource, more specifically, to give a right to one of the plural tasks for exclusively using the resource at one time.
A conventional multitask system includes an exclusive control module termed “semaphore” for carrying out the foregoing exclusive control. The term, semaphore, stands for a railroad device which sends signals using its arms. The semaphore used in a computer system remains held in its reset state by an Operating System (OS) when the resource is used by none of the tasks. When one of the task intends to access the resource, it has to receive a right of exclusive use from the OS and the semaphore is turned to the set state.
While the semaphore for a particular resource is set, the access of the other tasks to the resource is inhibited by the OS.
The conventional exclusive control method for a computer system using the semaphore is now explained referring to the schematic diagram of FIG.
1
. The example is designed in that when a task A intends to access a resource X, a P operation (for obtaining the semaphore; a V operation for returning) has to be carried out to a semaphore S corresponding to the resource X.
FIG. 1
illustrates steps of allowing the task A to reach an access function for the resource X, operating the P operation for the semaphore S, and carrying out the access to the resource X. It is now assumed that while the task A is turned to sleeping by any reason such as standby for the accessing resource during the access of the task A to the resource X, a task B runs and reaches the access function for the resource X. The task B then starts operating the P operation for the semaphore S. However, since the semaphore S has been already obtained by the task A (P operation), the task B is turned to sleeping with the P operation for the semaphore S till the semaphore S is returned by the task A (V operation).
These steps conform a procedure incorporating the conventional exclusive control method for a computer system with the semaphore. It should be understood that when the semaphore S is returned by the task A (V operation), it allows the task B to carry out to obtain the semaphore S (P operation) for access to the resource X.
The steps are explained with an existing computer system in more detail. For example, the conventional exclusive control method is executed in the computer system which has an arrangement shown in the block diagram of FIG.
2
.
As shown in
FIG. 2
, the computer system comprises substantially a CPU
11
, a main memory (RAM)
12
, a hard disk drive (HDD)
13
, a camera
14
, a microphone
15
, and a direct main memory access controller (DMAC)
16
, etc. connected to each other by a bus
10
. The bus
10
is connected to the camera
14
via a video buffer
140
for buffering video data, the microphone
15
via an audio buffer
150
for buffering audio data, and the HDD
13
via a hard disk (HD) controller
130
for controlling the HDD
13
. The HDD
13
is accessed by the DMAC
16
(for writing and reading data).
It is assumed that the access to the HDD
13
in the computer system is carried out by a plurality of tasks (A, B, and so on). The task A carries out processing for writing a video data produced and taken by the camera
14
into the HDD
13
, and the task B carries out processing for writing an audio data produced and taken by the microphone
15
into the HDD
13
, according to a multitask processing. The other tasks than the two tasks A and B such as a task for accessing the video buffer
140
coupled to the camera
14
and a task for accessing the audio buffer
150
coupled to the microphone
15
are included. Since the resources such as the HDD
13
, the camera
14
, and the microphone
15
are accessed by two or more tasks including the tasks A and B, the exclusive control using the semaphore has to be conducted.
FIG. 3
is a flow chart showing a procedure of the task A in which the audio data taken by the camera
14
is transferred to the main memory
12
and written into the HDD
13
using the DMAC
16
.
The task A remains in its sleeping state until the video buffer
140
is fully written with the video data from the camera
14
(Step S
11
). When the video buffer
140
has fully been written, it enables an interrupt from the video buffer
140
and a wake up instruction is issued to the task A by the interrupt handler, thereby waking up the task A. As the task A is waken up, it performs the P operation for a semaphore X to exclusively control the video buffer
140
(Step S
12
) and obtains the right for accessing the video buffer
140
.
As the task A has obtained the right for accessing the video buffer
140
, the video data is transferred from the video buffer
140
to the main memory
12
(Step S
13
) and the V operation for the semaphore X is carried out to release the right by accessing the video buffer
140
by the task A (Step S
14
). It is then judged whether or not the main memory
12
has received one block (unit for transfer to the HDD
13
) of the video data (Step S
15
). Until the main memory
12
is written with one block of the video data (“NO” at Step S
15
), the Step S
11
through the Step S
11
are repeated.
When it is judged that the main memory
12
has received one block of the video data (“YES” at Step S
15
), the task A performs the P operation for a semaphore Y to exclusively control the HDD
13
(Step S
16
), and obtains the right for accessing the HDD
13
.
As the task A obtains the right for accessing the HDD
13
, a DMA transfer for transferring the video data from the main memory
12
to the HDD
13
is set (Step S
17
). Then, the video data is transferred by the DMAC
16
from the main memory
12
to the HDD
13
while the task A remains at its sleeping state until the transfer is completed (Step S
18
). After the DMA transfer is finished, an interrupt for the task A is carried out to issue a wake up instruction to the task A by the interrupt handler, thereby waking up the task A. As the task A has been waken up, it starts the V operation for the semaphore Y (Step S
19
) and releases the right for the HDD
13
. The procedure is then returned back to Step S
11
.
FIG. 4
shows a flow chart of procedure of the task B where the audio data taken by the microphone
15
is transferred to the main memory
12
and written into the HDD
13
using the DMAC
16
.
The task B remains in its sleeping state until the audio buffer
150
is fully written with the audio data taken by the microphone
15
(Step S
21
). When the audio buffer
150
has fully been written, an interrupt from the audio duffer
150
is carried out to issue a wake up instruction to the task B by the interrupt handler, thereby waking up the task B. As the task B is waken up, it performs the P operation for a semaphore Z for exclusively controlling the audio buffer
150
(Step S
22
) and obtains the right for accessing the audio buffer
150
.
As the task B has obtained the right for accessing the audio buffer
150
, the audio data is transferred from the audio buffer
150
to the main memory
12
(Step S
23
) and the V operation for the semaphore Z is carried out to release the right of the accessing of the audio buffer
150
by the task B (Step S
24
). It is then judged whether or not the main
Banankhah Majid A.
Darby & Darby
Sanyo Electric Co,. Ltd.
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