Method and system for controlling a bus with multiple system hos

Details Method and system for controlling a bus with multiple system hos Method and system for controlling a bus with multiple system hos

1998-05-14

2000-12-12

Hua, Ly V.

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

714 13, G06F 1116

Patent

active

061611972

ABSTRACT:
In a method for swapping a system host board (150,160,170,180), when a failure is detected on a first system processor board (150), control of a first CompactPCI bus (110) is transferred from a first system processor board system host (154) to a first bridge board system host(164). In an active/standby configuration, control of a second CompactPCI bus (120) is transferred from a second bridge board system host (184) to a second system processor board system host (174), and control of the devices on the first CompactPCI bus (110) and second CompactPCI bus (120) is transferred from the first system processor (152) to the second system processor (172) without resetting any devices on the system.

REFERENCES:
patent: 5276864 (1994-01-01), Hernandez et al.
patent: 5442520 (1995-08-01), Kemp et al.
patent: 5812757 (1998-09-01), Okamoto et al.
Booklet entitled "CompactPCI Specification" by PCI Industrial Computers (Sep. 2, 1997).

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