Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-07-24
2007-07-24
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
10620285
ABSTRACT:
A method for generating lithography marks includes generating integrated circuit design data and using context information from the integrated circuit design data to write a mask.
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Pack Robert C.
Scheffer Louis K.
Bingham & McCutchen LLP
Cadence Design Systems Inc.
Chiang Jack
Tat Binh
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